Segmented paging architecture for virtual memory


#1

A computer system has the segmented paging architecture for virtual memory. The memory is byte addressable. Both virtual and physical address spaces contain 2^16 bytes each. The virtual address space is divided into 8 non-overlapping equal size segments. The memory management unit (MMU) has a hardware segment table, each entry of which contains the physical address of the page table for the segment. Page table are stored in the main memory and consists of 2 byte page table entries.

  • What is the minimum page size in bytes so that the page table for a segment requires at most one page to store it? Assume that the page size can only be a power of 2
    a) 140 bytes b) 128 bytes c) 158 bytes d) 112 bytes

  • Now let’s assume that the page size is of 256 bytes. Assume that each page table entry contains (besides frame number) 1 valid bit, 3 bits for page protection and 1 dirty bit. How many bits are available in page table entry for storing the aging information for the page?
    a) 24 b) 38 c) 42 d) 51