Scaled indexing


consider a processor that includes a base with indexing addressing mode. suppose an instruction is encountered that employs this addressing mode and specifies a displacement of 1970, in decimal. currently the base and index register contain the decimal numbers 48022 and 8 respectively. what is the address of the operand? how does the answer changes if scaled indexing(factor of four) is used?


for base with indexing address mode:-
address of operand= (contents of base register +
contents of index register +
=48022+8+1970 = 50000

if displacement is not taken into consideration then address will be (base + index)=48022+8=48030

for scaled indexing (factor=4)
address of operand= (base + index*factor +
= 48022+(8 x 4)+1970= 50024