Context switching in Os


#1
  1. Which of the following need not necessarily be saved on a context switch between process…??
    also give the **explanation…

(A) General purpose registers
(B) Translation look aside buffer
© Program counter
(D) All of the above


#2

During context switch between processes , the state of the first process must be saved so that, when the scheduler gets back to the execution of the first process, it can restore this state and continue.
PC, stack and registers must be saved as otherwise program cannot resume.
On the other hand, a Translation lookaside buffer (TLB) is a CPU cache that memory management hardware uses to improve virtual address translation speed. They are just bonus for ensuring better performance.
We don’t need to save TLB to ensure correct program resumption.
Answer-B


#3

General purpose register states are needed to be saved, as tp resume the calculation, without resetting the already computed data.

Program Counter signifies which line/instructiom is to be executed when the process resumes.

TLB need not be saved, as it resides in the cache memory for a fast access to addresses requested by the process, which doesnt need to be saved when the process is preempted.


#4

#5

Answer: (b)
Explanation:
In a process context switch, the state of the first process must be saved somehow, so that, when the scheduler gets back to the execution of the first process, it can restore this state and continue.

The state of the process includes all the registers that the process may be using, especially the program counter, plus any other operating system specific data that may be necessary.

A Translation lookaside buffer (TLB) is a CPU cache that memory management hardware uses to improve virtual address translation speed. A TLB has a fixed number of slots that contain page table entries, which map virtual addresses to physical addresses. On a context switch, some TLB entries can become invalid, since the virtual-to-physical mapping is different. The simplest strategy to deal with this is to completely flush the TLB.


#6

option ©

A Translation lookaside buffer (TLB) is a CPU cache that memory management hardware uses to improve virtual address translation speed. On a context switch, some TLB entries can become invalid, since the virtual-to-physical mapping is different. The simplest strategy to deal with this is to completely flush the TLB.
so the answer is option ©